Computers, personal digital assistants, cellular telephones and other electronic systems and devices typically include processors and memory. The memory is used to store instructions (typically in the form of computer programs) to be executed and/or data to be operated on by the processors to achieve the functionality of the device. In some applications, the systems and devices may require that the instructions and/or data be retained in some form of a permanent/non-volatile storage medium so that the information is not lost when the device is turned off or power is removed. Exemplary applications include computer BIOS storage and diskless handheld computing devices such as personal digital assistants.
One way to provide such non-volatile storage capability is to include a mass-storage device such as a hard disk drive. Hard disk drives are mechanical devices which store data on rotating magnetic platters. However, such devices may be difficult to fit in small systems and may have significant reliability, cost and manufacturing constraints. An alternative to such devices are integrated-circuit based non-volatile memories. One type of non-volatile memory that can be used is Erasable Programmable Read Only Memory ("EPROM"). While conventional EPROM's provide reliable non-volatile storage, they may not be able to be reprogrammed in the field in a practical manner. For example, EPROM's typically require exposure to ultraviolet light to erase them which may require that the EPROM memory chips be removed from the device. Once erased and reprogrammed, they are placed back in the device. In many applications, removing the memory to reprogram the device is not practical. In addition, besides not being easily reprogrammed, EPROM's may not have satisfactory data storage densities.
To avoid the complexity of EPROM's and to provide a device that can be reprogrammed in the field, many electronic designs use Electrically Erasable Programmable Read Only Memory ("EEPROM"), Static Random Access Memory ("SRAM") or flash memory, which can be reprogrammed electrically and without special hardware. SRAM is not technically a form of non-volatile memory but can be used in some applications requiring non-volatile capability.
EEPROM has the disadvantages of being expensive and having a very limited life cycle, i.e. an EEPROM can only be erased and rewritten a limited number of times before the device becomes non-functional. SRAM offers high operating speeds but only maintains its contents as long as power is supplied, therefore requiring a battery or other power source. This necessitates additional hardware to maintain power to the SRAM to preserve the stored contents which increases manufacturing cost and complexity. Further, the additional hardware may put undesirable constraints on the physical size of the design. In addition, EEPROM's and SRAM's may not have as high a data storage density as compared to other forms of storage. Therefore, where cost, size or density is a factor, flash memories are preferred because they may be simpler to reprogram in the field then EPROM's, less expensive than EEPROM's, easier to implement than battery-backed SRAM's and available in higher data storage densities.
Flash memory (or flash RAM) is a form of non-volatile storage which uses a memory cell design with a floating gate. High voltages are applied to the memory cell inputs to program/store charge on the floating gate or to erase/remove charge from the floating gate. Programming occurs by hot electron transfer to place charge on the floating gate while erasure makes use of Fowler-Nordheim tunneling in which electrons pierce through a thin dielectric material, reducing the amount of electronic charge on the floating gate. Erasing a cell sets the logical value of the cell to "1" while programming the cell sets the logical value to "0". Aside from programming or erasing operations, a flash memory operates similarly to a randomly accessible read only memory (ROM). Conventionally, a flash memory chip, including the flash memory storage cells and support logic/circuitry, is made by fabricating layers of semiconductor material and interconnect layers of polysilicon and first and second metal layers onto a substrate. It will be appreciated that there are numerous integrated circuit fabrication techniques, involving more or fewer layers, which are applicable herein.
Prior flash memories could only be erased by erasing the entire memory chip also known as bulk erasure. Byte by byte erasure was not possible. To somewhat alleviate this problem, modem flash memory is typically divided logically into blocks called "sectors" where each sector contains a portion of the total bytes of data storage available. For example, a typical flash memory may have 32 megabits of total storage and be logically broken down into 64 sectors, each sector containing 64 Kilobytes of data (one byte being equal to eight bits). This arrangement allows for the option of erasure of one sector at a time in addition to bulk erasure of the entire memory. While typical flash memories are still incapable of byte by byte erasure, data in the flash memory may still be programmed byte by byte (or sometimes word by word, where a word equals four bytes) depending on the implementation. It will be appreciated that the granularity by which a flash memory device can be programmed or erased may vary and that granularities down to bit level programming/erasure are contemplated.
In order to program and/or erase a flash memory, typically a complex process must be followed. For example, before erasing a particular sector, that sector must be programmed (known as "pre-programming"). These steps of erasing and programming involve complex application of high voltages to the memory cells for specified periods of time and in particular sequences. Many flash memories provide embedded state machines which perform the complex programming and erasing operations automatically. These processes of programming and erasing a flash memory may take a long time to complete. A typical erase sequence can take anywhere from 0.7 seconds up to 15 seconds. To erase an entire chip can take up to 49 seconds. While programming is much faster, on the order of 7 to 300 micro-seconds, it is still slow compared to other memory devices. Programming an entire chip can take up to 7 seconds (including the time to verify the data). Typically, standard Dynamic Random Access Memory ("DRAM") offers access times on the order of nano-seconds, a difference between micro-seconds of many orders of magnitude.
This complex nature of programming and erasing flash memory devices leads to a major problem in that they do not provide sufficiently fast random access. For example, conventional flash memory devices typically do not allow a processor to perform a read operation while a program or erase operation is underway in the flash memory device. In most implementations, the processor is required to periodically poll a status register of the flash memory device to detect the end of the program or erase operation before initiating a read operation to the flash memory device.
Unfortunately, as noted above, the programming and erase cycle times for typical flash memory devices are orders of magnitude greater than acceptable write access times of a conventional random access main memory using, for example, Dynamic Random Access Memory ("DRAM"). Such long latencies associated with programming or erase operations can lock up the operating system and prevent the system from functioning for unacceptably long time intervals if the flash memory is the only memory in the electronic system. Some prior flash memories allow erase suspend operations in order to address this problem. Erase suspend allows the processor to pause an erase operation so another sector can be read. However, such memories typically still impose a suspend latency interval of several microseconds before a read operation can be initiated. A typical suspend latency interval is from 0.1 to 20 microseconds.
Prior systems may employ multiple flash memory devices in an attempt to prevent such operating system lock up. In such systems, the processor usually has read access to one of the flash memory devices while other flash memory devices are undergoing a program or erase operation. However, such systems typically suffer from high costs because multiple flash memory devices are implemented even though the capacity of a single flash memory device may accommodate the needs of the particular electronic device.
Another prior art system uses a flash memory in combination with an EEPROM memory. This system allows a read operation of one of the memories while writing to the other. However, the size of an EEPROM memory cell is significantly larger than that of a flash memory cell which reduces the amount of storage that can be placed on the memory chip. Further, there are significant design and manufacturing complexities involved with integrating two different memory technologies on the same chip. Therefore, a device which uses an EEPROM in combination with a flash memory will typically be more expensive both to design and manufacture.
In addition, programming and erasing a flash memory involves higher than normal voltages as compared to performing read operations. The use of these higher than normal voltages can cause problems when trying to implement the capability to simultaneously read while programming/erasing. Such problems include difficulties in distributing the high voltages required for the program and erase operations along with normal voltage for read operations and handling increased noise induced on the read sense outputs by the use of high voltages elsewhere within the device. Further, depending on the implementation, redundant logic may also be employed which introduces further complexities.
To control the process of writing or erasing data, write protect circuits are included in a flash memory. A write protect signal is generated by such circuits to indicate that a memory cell is protected and should not be overwritten. However, to achieve efficiency in layout area, such write protect circuits should be located throughout the memory device. This can require substantial routing of signal lines to control and detect the write protect signals. However, this leads to excessive capacitance on the signal lines, which slows the write protect circuit down.
Accordingly, there is a need for an efficiently designed and manufacturable flash memory device that allows rapid detection of a write protected state.